Call for Papers
The 26th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA 2019) is organized by the IEEE RS/ EPS/ EDS Singapore Chapter and the IEEE Electron Devices Society (EDS) Hangzhou Chapter, China. The Symposium is technically co-sponsored by the IEEE Electron Device Society and IEEE Reliability Society.
IPFA 2019 will be devoted to the fundamental understanding of the physical mechanisms governing reliability and failure in a large variety of advanced semiconductor devices and the electrical – physical failure analysis techniques, test methodologies, reliability models, simulations and characterization tools that could be used to reliably identify the root cause of failure and the lifetime of these devices under different stress regimes.
Starting this year, we are expanding our focus on new topics relating to reliability and failure analysis of wide bandgap devices, non-volatile memory technologies (e-Flash, RRAM, STT-MRAM, etc.), photovoltaics as well as 2D materials and applications relating to these technologies in hardware security, counterfeit electronics, IoT, edge computing and neuromorphic systems.
The Technical Programme Committee is inviting papers related, but not limited to, the following areas:
- Sample Preparation, Metrology and Defect Characterization
- Die-Level / System-Level Failure Analysis Case Studies
- Package Level Failure Analysis
- Advanced Fault Isolation Techniques
- Advanced Physical Failure Analysis Techniques
- Emerging Topics in Failure Analysis
- Transistor and NVM Device Reliability
- Interconnect and Packaging Reliability
- 2D Devices Reliability and Failure Analysis
- Photovoltaic Device Reliability and Failure Analysis
- High Power Electronics / Wide Bandgap Device Reliability and Failure Analysis
Within the track on “Emerging Topics in Failure Analysis”, we would like to welcome your submissions that look at the application or relevance of failure analysis methods and techniques to modern technology applications including hardware security, artificial intelligence, machine learning, photonics and deep learning hardware.
The Technical Program Committee is inviting papers related, but not limited to, the following areas:
Sample Preparation, Metrology and Defect Characterization: Device deprocessing; Ion beam / TEM sample preparation, Metrology, Defect inspection, Test chips.
Case Studies on Fault Isolation: Die / Board / System-level electrical FA, Electrical characterization and nanoprobing.
Case Studies on Physical Failure Analysis: Die / Board / System-level physical FA, Design for manufacturing, Construction Analysis, Reverse engineering.
Package-Level Failure Analysis: 2.x D/ 3D Package FA, Magnetic/acoustic applications, 2.x D/ 3D X-ray, FTIR, non-destructive failure analysis, Workflows.
Advanced Electrical Fault Isolation Techniques: Advanced methodologies in photon and laser-based microscopy techniques, Dynamic techniques, Acoustic microscopy, Magnetic imaging, Nanoprobing, AFP, EBAC/EBIC, Software-based diagnostic techniques.
Advanced Physical Failure Analysis Techniques: Advanced methodologies in PFA, Advanced optical beam, Ion beam approaches, Circuit-edits, Delayering recipes and innovations. Tomography.
NEW! Emerging Topics in Failure Analysis: FA for hardware security, Reverse engineering, Artificial intelligence (AI) for FA – fault detection, failure root cause identification, SEM/TEM image analytics, analysis and characterization, FA for IoT systems, FA for non-CMOS device technologies (MEMS/NEMS, Silicon Photonics etc.)
Transistor and NVM Device Reliability: Gate oxide/High-κ Reliability, PBTI/NBTI, Hot carrier, Random Telegraph Noise (RTN) and single dopant effects, Self Heating in Sub-10 nm CMOS. Process and stress-induced reliability issues and variability, ESD/EOS Failures and Radiation effects; circuit level analysis of performance variability, Non-volatile memory (NVM) reliability – retention, endurance and read disturb in PCRAM, RRAM, STT-MRAM, reliability of ferroelectric devices (FeFETs, FeRAM).
Interconnect and Packaging Reliability: TDDB in low-κ dielectrics, Electromigration, stress migration, process & stress-induced variability in interconnects, cracking, corrosion, and fatigue in bond pads, Reliability of 3DIC and TSV, Thermo-mechanical stress, power dissipation issues, wafer warpage, wire bonding, die attach and encapsulation issues, wafer bonding technology, yield and reliability.
NEW! Photovoltaic and Photonics Devices – Reliability & FA: Failure mechanisms and reliability test of LEDs made of GaN, GaAs, InP etc., solar cells made of silicon, CdTe, CIGS, organic materials, multi-junction, perovskite etc., infrared photodetectors, waveguides.
NEW! High Power Electronics / Wide Bandgap Device Reliability & Failure Analysis: Reliability of devices based on GaAs, GaN, SiC and Ga2O3 systems, Trap-related degradation; materials-related defect characterization, radiation effects, process variability, III-V/Si integration.
NEW! 2D Materials and Devices: Reliability & Failure Analysis: Tunnel FETs, transistors with 2D materials (Graphene, MoS2, WSe2, h-BN), ferroelectric and negative capacitance FETs, quantum computing, spintronics.
Prospective authors are requested to submit at least a two-page abstract (including text and figures) of their previously unpublished and original research work. The two-page abstract should include the following:
- Brief introduction to the background and motivation/objectives of the work.
- Experimental results, analysis and discussion.
- Summary of the findings, highlighting their impact, novelty and importance.
- Supporting figures, tables, and references.
AII submissions must be in English. The materials in the paper must be original and unpublished. Please work on the abstract according to the provided template in the IPFA webpage. Only electronic submissions in PDF format will be accepted.
Please limit your submission file size to 5 MB and submit your abstract through the IPFA Website http://www.ipfa-ieee.org by 12 March 2019. For further details please contact the Technical Program Chair / Co-Chair (details provided below).
Authors of papers that have been accepted for oral / poster presentation will be notified by 5 April 2019. Upon notification of acceptance, authors will be asked to submit a final manuscript (mandatory and to be submitted by 15 May 2019). Accepted papers will be submitted for the possible inclusion into IEEE Xplore.
|May 15th, 2019||Submission of Final Manuscript|
Singapore University of Technology and Design
TECHNICAL PROGRAM CHAIRMAN
University of Electronic Science and Technology of China
CO-TECHNICAL PROGRAM CHAIRMAN
Wardhana A. Sasangka
Singapore-MIT Alliance for Research and Technology
You Liu Wu
National Chi Nan University