Dimitris P. Ioannou
Dimitris Ioannou is a Senior Member of Technical Staff at GlobalFoundries. He received his B.S degree in Physics from the University of Thessaloniki, Greece, and the M.S. and Ph.D. degrees in Electrical Engineering from George Mason University, Fairfax, VA. In 2006, he joined IBM where he played a critical role in the characterization and modeling of reliability mechanisms in advanced Silicon On Insulator (SOI) High-k/Metal Gate CMOS technologies including IBM’s 3D TSV technology. As of 2015 he is with GlobalFoundries where he leads the RF reliability of advanced SOI CMOS and SiGe BiCMOS devices. He has published over 40 papers in the field of CMOS reliability.
Tutorial Topic: Reliability of 3D Through-Silicon-Via (TSV) Technologies
3D integration has emerged as viable solution for meeting the growing demands and requirements of advanced CMOS systems such as higher performance, increased functionality, lower power consumption, all, at a smaller footprint. This tutorial will provide an overview of the key features of 3D TSV technologies and the challenges associated with them. It will discuss the impact of 3D TSV integration on FEOL, BEOL and package reliability highlighting the unique aspects of the TSV structure such as differential thermal expansion mismatch and the high aspect ratio structure. It will also discuss potential processing related reliability issues such as contamination effects, wafer thinning, dicing and packaging. Finally, it will provide with an overview of available mitigation strategies for these reliability challenges.