List of Accepted Papers

IPFA 2020 – List of Accepted Papers
Paper ID Track Track 01: Emerging Topics in Failure Analysis and Reliability
38 Track 1-1 Wafer Map Classifier using Deep Learning for Detecting Out-of-Distribution Failure Patterns
Yusung Kim
45 Track1-2 Distributed global dynamic wiring for bio-inspired self-repairing hardware
Li Duo, Liu Xiubin and Li Yue
68 Track 1-2 Sub-micron, Non-contact, Super-resolution Infrared Microspectroscopy for Successful Microelectronics Failure Analyses
Michael Lo, Curtis Marcott, Mustafa Kansiz, Eoghan Dillon and Craig
Prater
103 Track1-3 Security Evaluation of Deep Neural Network Resistance Against Laser Fault Injection
Xiaolu Hou, Jakub Breier, Dirmanto Jap, Lei Ma, Shivam Bhasin and Yang Liu
132 Track 1-3 ractical Cold boot attack on IoT device – Case study on Raspberry Pi
PYoo-Seung Won, Jong-Yeon Park, Dong-Guk Han and Shivam Bhasin
162 Track1-4 Second generation of optical IC-backside protection structure
Elham Amini, Tuba Kiyan, Norbert Herfurth, Anne Beyreuther, Christian Boit
andJean-Pierre Seifert
163 Track 1-4 Detection and prevention of assembly defects, by machine learning algorithms, in semiconductor industry for automotive
Corinne BERGES
169 Track1-5 Generalized Convolution Simulation Stack for RRAM Device based Deep Learning Neural Network
Lakshmana Prabhu Nagaraj and Nagarajan Raghavan
171 Track 1-5 Deep Learning-Based Image Analysis Framework for Hardware Assurance of Digital Integrated Circuits
Tong Lin, Yiqiong Shi, Na Shu, Deruo Cheng, Xuenong Hong, Jingsi Song and
Bah Hwee Gwee
182 Track1-6 Exploring RRAM Variability as Synapses on Inception Simulation Framework to Characterize the Prediction
Accuracy and Power Estimation per Bit for Convolution Neural Network

Lakshmana Prabhu Nagaraj and Nagarajan Raghavan
186 Invited Logic State Imaging From FA Techniques for Special Applications to One of the Most Powerful Hardware Security Side-Channel Threats
Christian Boit, Tuba Kiyan, Thilo Krachenfels and Jean-Pierre Seifert
187 Invited 1D and 2D Time-Resolved Emission Measurements of Circuits Fabricated in 14 nm Technology Node
FRANCO STELLARI, Andrea Bahgat Shehata and Peilin Song
Paper ID Track Track 02: Sample Preparation, Metrology and Defect Characterization
42 Track 2-1 Defect and Contamination Analysis Necessity with Multiple Surface Analytical Techniques
Lei Zhu, Caryn Sek, Jun Xian Goh, Yeh Yee Kee, Jing Fang Pan, Yanfei zhao, Younan Hua, Xiaomin Li
49 Track 2-2 Workflow Solution for Depth Resolved 3D NAND Critical Dimension Metrology
MARK NAJARIAN
53 Track 2-3 The Clean Sheet induced Contamination and their corresponding Failure Analysis
W.F. Hsieh, Henry Lin, Vincent Chen, Irene Ou, Fu-Wang Hsu and Yung Song Lou
120 Track 2-4 Vision-based EBR Metrology for Edge Bead Removal Optimization
Seung Hwa Hyun, Doo-Hyun Cho, Wan Sung Park and Tae Joong Kim
136 Track 2-5 Site-Specific Sample Preparation and Analysis of FinFET structure in 14nm Technology Node Chip via Atom Probe Tomography
Yamin Huang and Yemin Dong
154 Track 2-6 Advanced Sample Preparation Techniques for Rescuing Samples with Cracks, Scratches, or Unevenness in Delayering
Yanlin Pan, Pik Kee Tan, Siong Luong Ting and Changqing Chen
167 Track 2-7 FIB vs Cleaving Methods for Blanket Al Thickness Measurement on Wafers
Li Hong LI, Sharon LEE, Ley Hong KHOO, Poh Chuan ANG and Zhiqiang MO
178 Track 2-8 Cross-sectioning Technique for Bonded Silicon Substrates with Face-to-Face Interlaced Carbon Nanotubes in Microchannels
Hua Xu, Jeffery C.C. Lo and S.W. Ricky Lee
112 Track 2-9 Multi-layered film stack models to simulate X-ray reflectivity of TaN and Ta thin films
Ramesh Rao Nistala, Kian Kok ONG, Yun Wang, Xintong Zhu and Zhi Qiang Mo
Paper ID Track Track 03: Case Studies on Fault Isolation
46 Track 3-1 The design related issue debug by static fault isolation methodology
Changqing Chen
72 Track 3-2 Failure Analysis of a 0.35m CMOS process High Speed USB 2.0 (480 Mbps) DPDT Switch
Nazirul Izzat Mohd Arifen,Ricky Lontoc, Khairul Aiman Yusof and Mel Christian Granada
90 Track 3-3 Effectiveness of High Bias Voltage IREM on Elevated Vmin Failure: Case Study
Eric Paulraj, Kean Beng Oo,Yong Sheng Lok, Sandrawarman Balasundram and Siti Nurjatikesuma
92 Track 3-4 Utilization of ELITE System for Precise Fault Localization of Metal Defect Functional Failure
Ronald C.Apolinaria
93 Track 3-5 Solving Time Dependent IC Failures Through Unorthodox Emission Microscopy Technique
NIÑO JEROME LAGATIC and JENNIFER SANIDAD
106 Track 3-6 A Systematic Approach to Localize NVM Inter-Poly Defects using Nanoprobing Techniques
Fransiscus Rivai, Peng Tiong NG, A.C.T. Quah, Pik Kee Tan, Siong Luong Ting, KrishnanunniMenon and Ishitha Withana
113 Track 3-8 Defect Localization on MIM Capacitor Array by Circuit Edit using Focused-Ion Beam (FIB)
Jed Paolo Deligente
118 Track 3-9 Power Plane Defect Findings in Silicon with Lock-In Thermography & OBIRCH/TIVA Techniques
Chi Yung Ng, Muhammad Syafiq Muhamad Zamri, Huat Beng Ng, Jou Ching Ng, Saiful AzriMazlan, Woei Haur Chuah, Zhong Yong Ooi,Yong Khai Ooi, Steven Chen
129 Track 3-10 Efficient Fault and Defect Localization Through Multiple Emission Site Analysis
Arriane Lacaba, Andrea Pauline Arazas, Fritz Christian Awitan and Lawrence Benedict
152 Track 3-11 Case study on asymmetric Ids measured on MOSFET
Haijiao Bian, Ang Li and Shijun Zheng
173 Track 3-12 Significance of pre- and post- EFI data processing to Dynamic Electrical Fault Isolation
Boonlian Yeoh, Man Hon Thor, Szu Huat Goh, Yin Hong Chan, Li Song and Wei Fong Soh
Paper ID Track Track 04: Case Studies on Physical Failure Analysis
17 Track 4-1 Combined methods for analyzing the nonvisual failures of a MCU
Yiqiang Ni, Zongbei Dai, Xuanlong Chen,Guangning Xu, Liyuan Liu, Xiaoming Zhang,Qian Shi, Gaoming Shi, Jialin Zhang, Shaoping Li and Youliang Wang
70 Track 4-2 Case Study of SIMS analysis on Ge isotopes and As implant sample
Kian Kok ONG, Yun Wang and Zhiqiang Mo
84 Track 4-3 EELS Study of Core Loss Energy Shift for IC Failure Analysis
Ye Chen and JIE ZHU
101 Track 4-4 A Systematic Approach in the Root Cause Analysis of Battery Module Failures
Ruel Angelo Agpaoa, Nino Jerome Lagatic, Jennifer Sanidad and Jonathan Azares
74 Track 4-5 Failure Mechanism of the Power-Clamp Device of Buck Coverter during the Voltage Conversion
Jian-Hsing Lee
85 Track 4-6 Factors Causing the Lack of PVX Layer in FPC Bonding Zone of Large Size LCD Products and Its Improvement
Huiying Li, Weixiong Chen, Xin Li, Yong Song, Hongjun Yu and Hailin Xue
Paper ID Track Track 05: Package-Level Failure Analysis
34 Track 5-1 Sample Preparation for Deprocessing of 3D Multi-Die Stacked Package
Hwee Boon Katherine Kor, Qing Liu and Chee Lip Gan
36 Track 5-2 Decapsulation Method for 3D Stacked-die Packaged Devices
Xiaoling Lin
63 Track 5-3 Crack Identification in BEoL Stacks Using Acoustic Emission Testing and Nano X ray Computed Tomography
Jendrik Silomon, Jürgen Gluch, André Clausner, Jens Paul and Ehrenfried Zschech
131 Track 5-4 A CMUT receiving probe with an integrated preamplifier for through-transmission scanning acoustic tomography
Taiichi Takezaki, Shuntaro Machida and Daisuke Ryuzaki
Paper ID Track Track 06: Advanced Electrical Fault Isolation Techniques
31 Track 6-1 The Application of Circuit Debugging by Utilizing Pulse Function in Nano-Probing System
De Bin Lin
56 Track 6-2 Fault localization of IDDQ failure using External trigger Synchronous LIT technique
Nakaba Matsui,Yasushi Oka, Shinpei Tominaga and Akihito Uchikado
80 Track 6-3 Cooling mechanism for high performance device analysis.
HIROTAKA NONAKA, Hirotoshi Terada, TOMONORI NAKAMURA,HIROYUKI MATSUURA and AKIHIRO NAKAMURA
94 Track 6-4 High Resolution Imaging of Thick Si Device Using Doublet SIL
Xiangguang Mao
159 Track 6-5 Characterization of electronic devices by top-down Electron Beam Induced Current
Greg Johnson
161 Track 6-6 Comprehensive parametric investigations of EOFM measurements on single FinFET transistors
Anne Beyreuther,Norbert Herfurth, Elham Amini, Tomonori Nakamura, Babak Motamedi and Christian Boit
164 Track 6-7 Locating low-ohmic Varations in Resistance using Electron Beam Induced Voltage Imaging
Andrew Jonathan Smith, Andreas Rummel, Matthias Kemmler, Klaus Schock, Matthias Kemmler and Stephan Kleindiek
175 Track 6-8 Improving Dynamic Optical Beam Induced Resistance Change Methods for Defect Isolation
Man Hon Thor,Boonlian Yeoh, Szu Huat Goh and Yin Hong Chan
Paper ID Track Track 07: Advanced Physical Failure Analysis Techniques
82 Track 7-1 Improved Methodology for Planar TEM Sample Preparation
Irene Tee and Jie Zhu
83 Track 7-2 Fabrication on Pure Silicon Oxide Membrane Coated TEM Grid for Polymer Residual Defect Analysis
Irene Tee and Jie Zhu
99 Track 7-3 Advanced EDX Analysis for Memory Devices
Lai-Seng Yeoh
122 Track 7-4 Speeding up large-scale failure analysis of semiconductor devices by laser ablation
Marek Tuček
146 Track 7-5 Multi-Dimensional Nanoscale Characterizations on Devices by DataCube-sMIM
Peter Dewolf and Wanxin Sun
148 Track 7-6 Application of Circular Differential Interference Contrast Imaging in Semiconductor Failure Analysis Workflow
Kelvin Loh and Vignesh Viswanathan
166 Track 7-7 Noninvasive Backside Circuit-Edit Workflow using Low-kV STI Exposure
Or Haimson, Roy Goldman, Michael Wong, Oleg Sidorov, David Donnet, David Tien, Debbora Ahlgren, Neel Leslie and Jake Jensen
Paper ID Track Track 08: Product Test and Diagnostic
76 Track 8-1 New Energy Transformation Model for the Unclamped Inductive Switching (UIS) Test
Jian-Hsing Lee
88 Track 8-2 Study on acceleration life test method of thick film hybrid integrated
Zhang Xiaowen, Lv hongjie and Lin xiaoling
172 Track 8-3 Automated nets extraction for digital logic physical failure analysis on IP-secure products
Ngow Yee Ta,Szu Huat Goh, Leo Jacobus, Low Han Wen and Rupa Kamoji
30 Track 8-4 Study of reliability degradation in power RF LDMOS under pulsed life test due to impact ionization
M.A.Belaïd
Paper ID Track Track 09: Transistor and NVM Device Reliability
22 Track 9-1 Investigation of Saturated Drain Current Change Phases For PMOS HCI Stressed at Ibmax
WeiCheng Chu, B.A. Tsai, Yi-Heng Chen and Kun-ham Hsieh
52 Track 9-2 Analysis of the Effects of Boron Transient Enhanced Diffusion on Threshold Voltage Mismatch in Steep Retrograde Doping NMOSFETs with Inserted Oxygen Layers
Shuntaro Fujii, Hideki Takeuchi, Soichi Morita, Tatsushi Yagi, Shohei Hamada, Toshiro Sakamoto, Shinji Kawaguchi, Naoki Ishigami, Atsushi Okamoto, Shuji Ikeda, Hiu-Yung Wong, Robert J. Mears and Tsutomu Miyazakih
89 Track 9-3 Accurate TDDB Lifetime Prediction Based on Intrinsic CiDSR Effect Model with Regarding Extrinsic Failures
Akihiko Goda and Kenji Okada
100 Track 9-4 A Compact DC I-V Model for ReRAM
Binit Syamal, Jiahao Li, Siau Ben Chiah and Zhou Xing
104 Track 9-5 Investigation of Retention Failure Behavior in Analog RRAM Devices
Wendong Song, Hock Koon Lee, Weijie Wang,Minghua Li, Zhixian Chen, Jen-Chieh Liu, I-Ting Wang, Victor Yi-Qian Zhuo and Yao Zhu
110 Track 9-6 Endurance and Variability Control for Analog Switching in Dual Oxide Layer RRAM Devices
Weijie Wang, Wendong Song, Jen-Chieh Liu, Victor Yi-Qian Zhuo, Hock Koon Lee, I-Ting Wang, Minghua Li, Zhixian Chen, King Jien Chui and Yao Zhu
121 Track 9-7 SOTF-BTI – an S-Parameters based on-the-fly Bias Temperature Instability Characterization Method
Talha Chohan, Stefan Slesazeck, Gernot Krause, Steffen Lehmann, Thomas Mikolajick and Jens Trommer Jens Trommer
138 Track 9-8 Impact of Electron trapping on Energy Distribution Characterization of NBTI-Related Defects for Si p-FinFETs
Longda Zhou, Qingzhu Zhang, Hong Yang, Zhigang Ji, Zhaohao Zhang, Renren Xu, Huaxiang Yin, Anyan Du and Wenwu Wang
144 Track 9-9 Physical Modeling the Impact of Self-Heating on Hot-Carrier Degradation in pNWFETs
Stanislav Tyaginov, Alexander Makarov, Adrian Chasin, Erik Bury, Michiel Vandemaele, Markus Jech, Alexander Grill, An De Keersgieter, Dimitri Linten and Ben Kaczer
158 Track 9-10 Degradation Mechanism of Short Channel p-FinFETs under Hot Carrier Stress and Constant Voltage Stress
Hao Chang, Longda Zhou, Hong Yang, Zhigang Ji, Qianqian Liu, Hao Xu, Eddy Simoen, Huaxiang Yin and Wenwu Wang
135 Track 9-11 TID Radiation Impacts on Charge-trapping Macaroni 3D NAND Flash Memory
Qi Qin, Fei Wang, Xuepeng Zhan, Yuan Li and Jiezhi Chen
Paper ID Track Track 10: ESD, Latchup and Reliability for Space Applications
21 Track 10-1 Analysis of Atmospheric Neutron Radiation Effects in Automotive Electronics Systems
Yujuan He, Zhifeng Lei, Zhangang Zhang, Chao Peng, Jianke Li, Enxia Zhang and Yintang Yang
55 Track 10-2 Fault Injection Controller Based Framework to Characterize Multiple Bit Upset for FPGA Designs
Jhalak Sharma, Nanditha Rao and Otmane Ait Mohamed
58 Track 10-3 Optimization on On-Chip Surge Protection Device for USB Type-C HV Pins
Ming-Chun Chen, Ming-Dou Ker, Yeh-Ning Jou and Jian-Hsing Lee
75 Track 10-4 Design Methodology for Transmission-Line Based (TMLB) Pi-Type ESD Protection Circuit
Jian-Hsing Lee
128 Track 10-5 The Impact of Holding Voltage of Transient Voltage Suppressor (TVS) on Signal Integrity of Microelectronics System with CMOS ICs under System-Level ESD Test
Yu-Shu Shen, Ming-Dou Ker and Hsin-Chin Jiang
153 Track 10-6 Fundamental mechanism analyses of NBTI-induced effects on single-event upset hardness for SRAM cells
Zhongshan Zheng, Zhentao Li, Bo Li, Jiajun Luo, Zhengsheng Han and Xinyu Liu
Paper ID Track Track 11: Interconnect and Packaging Reliability
51 Track 11-1 Effect of Cu barrier from TaN/Ta Deposition barrier(DD) & TaN/Etching/Ta Deposition barrier(DED) on Cu EM reliability
Hui-lan Sung and Yun-Chi Liao
69 Track 11-2 Research on Electrochemical Corrosion of ITO Via Hole in GOA Area
Wei Chen, Hanqing Liu, Xin Li, Yong Song, Hongjun Yu and Hailin Xue
95 Track 11-3 Surface Electrode Ion Trap Developed and Improvement by Oxide-First-Metal Electrode-Last Approach for High Performance Quantum Computing
H. Y. Li, Wen Wei Seit, Hwang Gilho, J tao, Yu Dian Lim, Peng Zhao, Chuan Seng Tan
114 Track 11-4 Theoretical and Experimental Raman Study for Mechanical Stress in Die-attach Process
Tomoyuki Uchida, Takumi Masuyama, Ryuichi Sugie and Satoshi Watanabe
140 Track 11-5 Wafer Level High Density Hybrid Bonding for High Performance Computing
Hong-Miao Ji, Lin Ji, Fa-Xing Che, Hong-Yu Li, King Jien Chui and Masaya Kawano
149 Track 11-6 Frequency Response Study for a Ramped Field Induced Mass Transport Phenomenon
Swapnendu Ghosh, Debjit De Sarkar, Vijeyendra Sashtri, Ebinesh Abraham and Santanu Talukder
Paper ID Track Track 12: Photonics Device (Display, lighting and Photovoltaic) Reliability and Failure Analysis
26 Track 12-1 Study on Factors Affecting Optical Properties of Low Power Total Reflection Products
Zhiyong Wang, Yanyan Yin, Yinlin Gu, Yong Song, Hongjun Yu and Hailin Xue
27 Track 12-2 Analysis On Touch and Display Driver Integration Panel Under Strong Light Double-click Wakeup Failure
Zhengxin Zhang, Lei Guo, Yong Song, Hongjun Yu and Hailin Xue
28 Track 12-3 On the Mechanism of High Forward Voltage of InGaN Light Emitting Diodes
Mohammed Khalid Bin Dawood, Yi Yang, Cambridge Kon, Sabitha James, Alexavier Yong, Xiaoxiao Luo, Chee Kian Tan, Pua San Quek, Kelvin Teo and Sungwook Huh
40 Track 12-4 Analysis and Research on Jittering H-line Failure of Cost-down IC Driven GOA Panel in High Temperature Reliability Test
Yong Song, Lei Guo, Jiali Zhang, Zhengxin Zhang, Hongjun Yu and Hailin Xue
61 Track 12-5 Research on the relationship between the rigidity of cover glass and the damage of LCD in the drop test of whole machine
Bao Yazhou, Yang Gang, Song Yong, Yu Hongjun and Xue Hailin
66 Track 12-6 Study on Factors Affecting Black Matrix Charging of Positive Gamma LCD Products in High Humidity Operating Conditions
Tian Pengcheng, Xue Hailin, Yu Hongjun, Song Yong, Li Xin, Jia Mingming and Guo Lei
91 Track 12-7 Experimental Auger Recombination Study of a 2 m GaSb-Based Quantum Well Laser via Sidewall Spontaneous Emission
Xiang Li, Hong Wang, Wanjun Wang, Jia Xu Brian Sia, Xin Guo and Chongyang Liu
108 Track 12-8 Research and Improvement on Flicker of Reflective LCD
Weixiong Chen, Xin Li, Yong Song, Hongjun Yu and Hailin Xue
85 Track 12-9 Factors Causing the Lack of PVX Layer in FPC Bonding Zone of Large Size LCD Products and Its Improvement
Huiying Li, Weixiong Chen, Xin Li, Yong Song, Hongjun Yu and Hailin Xue
Paper ID Track Track 13: High Power Electronics / Wide Bandgap Device Reliability and Failure Analysis
48 Track 13-1 Effects of X-ray irradiation on vertical GaN-on-GaN Schottky barrier diode biased on the applied voltage
Xiao-Xi Li, Jin-Xin Chen, Huang Wei, Zhigang Ji, Zhi-Hong Feng, Su-Zhen Wu, Zhi-Qiang Xiao and Hong-Liang Lu
60 Track 13-2 Degradation mechanism of fluorine treated enhancement-mode AlGaN/GaN HEMTs under high reverse gate bias
Xuefeng Zheng, Anshuai Chen, Hao Zhang, Xiaohu Wang, Yingzhe Wang, Ning Hua, Xiaohua Ma and Yue Hao
78 Track 13-3 Modified Conductance Method for The Extraction of Interface Traps in GaN Metal-Insulator-Semiconductor High Electron Mobility Transistors
Yu-Chieh Chien, Fong-Min Ciou, Yu-Shan Lin, Ting-Tzu Kuo, Yu-Ching Tsao, Po-Hsun Chen and Ting-Chang Chang
115 Track 13-4 Time-Dependent Dielectric Breakdown of Gate Oxide on 4H-SiC with Different Oxidation and Isolation Processes
Yun-Ju Wang, Yi-Ting Huang, Bing-Yue Tsui and Chao-Hsin Chien
127 Track 13-5 Temperature characteristic analysis of C-SenseFET integrated Feedback-MOS structure
Yishang Zhao, Zehong Li, Shanghan Yang, Zhaofeng Sun, Yang Yang, Min Ren, Jinping Zhang, Wei Gao and Bo Zhang
133 Track 13-6 Silicon Nitride-induced Threshold Voltage Shift in p-GaN HEMTs with Au-free Gate-first Process
Yi-Cheng Chen, Shun-Wei Tang, Pin-Hau Lin, Zheng-Chen Chen, Ming-Hao Lu, Kuo-Hsing Kao and Tian-Li Wu
137 Track 13-7 Robust Forward Gate Bias TDDB Stability in Enhancement-mode Fully Recessed Gate GaN MIS-FETs with ALD Al2O3 Gate Dielectric
Shun-Wei Tang, Sayeem Kutub and Tian-Li Wu
139 Track 13-8 Bias Temperature Instability of GaN Cascode Power Switch
SURYA ELANGOVAN, Chun-Han Huang, Ching-An Chen, Stone Cheng and Edward Yi Chang
145 Track 13-9 dV/dt Induced Failure and Improvement of Power Superjunction MOSFET
Min Ren
150 Track 13-10 dReducing dynamic on-resistance of p-GaN gate HEMTs using dual field plate configurations
Qiaoyu Hu, Fanming Zeng, Wei-Chih Cheng, Guangnan Zhou, Qing Wang and Hongyu Yu
179 Track 13-11 Short Term Reliability and Robustness of ultra-thin barrier, 110 nm-gate AlN/GaN HEMTs
Zhan GAO
185 Invited On the use of Po210 and Am241 collimated alpha sources for the characterization of the onset of carrier multiplication in power devices
Mauro Ciappa and Marco Pocaterra
Paper ID Track Track 14: Reliability and Failure Analysis for 2D Nanoelectronics
59 Track 14-1 Reliability study of flexible sodium-ion detection sensor
Jiayan Zhang, Linjing Xie, Xiyue Tian, Zewei Luo, Chaolun Wang and Xing Wu
124 Track 14-2 Thermal reliability study of graphene-based planar RRAM
Yin Xia, Chen Luo, Xin Yang, Chaolun Wang, Wenzhong Bao and Wu Xing