Dr. Andrew Kim
Andrew Kim is a senior staff at CMOS reliability R/D team of NSG (Non-volatile memory Solutions Group), Intel Corporation, Folsom, CA, USA. His current focus is BEOL reliability of Cu interconnects. He served as a chair/vice-chair of Dielectric Committee of IRPS2019/2018. Since 1998, he has been working on semiconductor interconnect reliability, BEOL process integration, eFuse design/reliability, TCAD on strained silicon, CMP modeling at various companies (IBM, Samsung and Texas Instruments), gas turbine design and system reliability team at General Electric. He received a B.S. with a minor in Mathematics in 1995 from California State University, Fullerton, CA, M.S. and Ph.D., respectively in 1996 and 2001, from Rensselaer Polytechnic Institute, Troy, NY, all in Mechanical Engineering.
Invited Talk Topic: Challenges of XEOL (X=F, M and B) Time-Dependent Dielectric Breakdown Reliability in advanced CMOS technologies
Time-dependent dielectric breakdown reliability has always been one of the major reliability concerns in advanced CMOS technologies across FEOL (Front-End-of-Line), MOL (Middle-End-of-Line) and BEOL (Back-End-of-Line). TDDB has become even more challenging and it is only expected to become more complex in current and future technology nodes by new integration schemes and new materials in all FEOL, MOL and BEOL. In this talk, focused reviews will be presented on TDDB evaluation challenges, available voltage acceleration models, statistical models to consider dielectric thickness variation effect on TDDB time-to-fail and fast screening methods (Ramped Voltage Stress and Ramped Current Stress) applicable to FEOL, MOL and BEOL dielectrics.