Dr. Franco Stellari

Franco Stellari (S’95–M’04-SM’06) received the M.S. degree (summa cum laude) and the Ph.D. degree in electronics engineering from the Politecnico di Milano, Milan, Italy, in 1998 and 2002 respectively. He subsequently joined the IBM T.J. Watson Research Center in Yorktown Heights, NY as a post-doc, becoming a permanent Research Staff Member in 2004. His major interest is the development and use of new optical techniques for testing VLSI circuits based on static imaging, time resolved emission and laser based techniques. During the years he has worked with single-photon detectors with fast response time and very high quantum efficiency, such as InGaAs Single Photon Avalanche Diodes (SPADs) and Superconducting Single Photon Detectors (SSPD), pushing their limits towards record low voltage applications. In 1999 he developed a model of the transistor emission that is still currently used for estimating luminescence from electric circuits. He has also developed a novel methodology for studying latch-up ignition, process variability, power supply noise measurement, and signal integrity. More recently, he has worked on fully exploiting the Light Emission from Off-State Leakage Current (LEOSLC) to developed novel techniques for VLSI circuit testing and hardware security such as chip alterations detection, and logic state mapping, chip reverse engineering, etc. His work leverages the development of automated data collection, advanced analysis, image processing, and computer vision for signal isolation and data extraction. He has more than 100 international publications, more than 45 granted patents. Some of his work in the field of advanced detectors was recognized with the Paul F. Forman Team Engineering Excellence Award in 2015. He was also the recipient of the IEEE EDS Paul Rappaport Award for the best Trans. on Electron Devices of 2004, the Best Poster Award at the International Symposium for Test and Failure Analysis (ISTFA) in 2014, and the Best Paper Award at the European Symposium on Reliability of Electron Devices, Failure Physics and Analysis (ESREF) twice, in 2002 and 2004.

Invited Talk Topic: 1D and 2D Time-Resolved Emission Measurements of Circuits Fabricated in 14 nm Technology Node

TRE measurements for circuit debugging, fault localization, and circuit characterization are discussed along recent detectors developments that have improved their low-voltage sensitivity, while maintaining an excellent jitter and low noise performance. Advantages and disadvantages of TRE methodologies are discussed and contrasted with laser probing techniques. 14 nm test cases are presented for logic debug, SRAM characterization, and early technology development. Finally, several advanced applications that are mostly unique to TRE have been summarized. TRE has a unique capability to contribute to test and diagnostics applications, especially when conditions make laser-based technique difficult to use due to the lack of resolution or invasiveness.